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CS 315-02 Lecture/Lab Meeting Summary — Fall 2025

  • Date: October 23, 2025
  • Time: 02:49 PM Pacific
  • Meeting ID: 868 6589 0521

Quick Recap

The session prepared students for Project 5, which involves building a circuit to statically analyze instruction words in a program. Greg explained: - How to implement instruction memory using ROMs and multiplexers. - How to convert object files into .hex format using a Python tool for ROM initialization. - How a priority encoder works and how to classify RISC-V instructions using comparators plus a priority encoder. - The importance of following a specified ordering when decoding instruction types.

Next Steps

  • Implement instruction memory using four ROM components, each loaded with a different program.
  • Generate .hex files for each program using the MakeROM3 Python script on a RISC-V machine.
  • Build the instruction decoder using comparators and priority encoders.
  • Implement a counter circuit to track instruction-type totals.
  • Assemble the complete Project 5 circuit according to the discussed specifications.
  • Greg will update project documentation with clarification on using ROM components.

Summary

Project 5 Circuit Design Overview

  • Goal: Build a circuit that statically analyzes and counts instruction types, producing totals (following a provided C implementation as a reference).
  • Stop condition: The circuit halts analysis when it encounters an unimplemented instruction, mirroring the C logic.
  • Ordering rule: Check for J-type instructions before JAL instructions to ensure accurate classification and counts.

ROM Implementation and Programming

  • Instruction memory is implemented using ROM components.
  • Greg demonstrated configuring ROM and loading instruction words.
  • Tooling: The MakeROM3 Python program converts object files into the required .hex format for ROM initialization.
  • Rationale: Understanding ROM setup is essential for future labs and projects.

Instruction Memory Architecture

  • Implementation uses ROMs and multiplexers to support multiple programs.
  • Design supports analyzing four different programs; a program selector chooses which program to analyze.
  • Workflow includes loading .hex files into ROMs.
  • The session introduced priority encoders and their role in decoding instruction types.
  • Note on digital design: Maintain clear spacing and organization of outputs in schematics.

Priority Encoder: Function and Usage

  • The priority encoder maps condition signals to an instruction number (inum).
  • Greg demonstrated splitting a 32-bit instruction and focusing on opcode bits (e.g., bits 6–7) for comparisons.
  • For this use case, all inputs are tied high; the Ne output can be ignored.
  • Rule of thumb: When conditions overlap, prioritize the more constrained (more specific) checks.

RISC-V Instruction Classifier Circuit

  • Classification is performed using comparators against constant patterns (e.g., I-type, R-type, etc.).
  • The priority encoder outputs the instruction number corresponding to the highest-priority matching type.
  • Correct ordering of conditions is essential for accurate classification.

JAL Instruction Circuit Optimization

  • Special case: JAL with RD = 0.
  • Optimization: Combine comparator checks using an AND gate instead of sequential checks (unlike C code, hardware evaluates concurrently).
  • The priority encoder resolves overlaps by selecting the highest-priority match, ensuring correct counting when both JAL and RD=0 conditions apply.

Priority Encoder Demonstration and Testing

  • Greg demonstrated implementing the priority encoder with overlapping conditions handled by prioritization.
  • Testing guidance:
  • Run provided test cases in the circuit simulator.
  • Manually single-step clock cycles to observe counters and classification behavior.
  • Experiment with test scripts to deepen understanding.