Greg reviewed diverse approaches to Project 6 and outlined remaining semester tasks: Lab 11 practice questions and the final project (Project 7).
He introduced key computer architecture concepts: multi-cycle processors and pipelining, using both theory and a laundry analogy to illustrate throughput.
He explained pipeline hazards (data and control) and current operational challenges.
He announced an extra-credit option to combine Projects 6 and 7 into a full pipeline version capable of passing all Project 6 tests.
He noted that Project 7 materials would be released soon.
Greg highlighted the variety and innovation in students’ approaches to Project 6, including incremental partitioning and circuit explanations.
He encouraged students to schedule interactive grading if they lacked sufficient work for full credit.
Remaining semester items include:
Lab 11 practice questions (due next week),
Continued lectures on pipelining,
Project 7 as the final project (due the last day of class).
Final exam coverage: approximately 75% post-midterm material and 25% pre-midterm, with some overlap across projects.
He introduced multi-cycle processors in contrast to single-cycle designs and set expectations that Project 7 will explore additional architectural complexity.
Multi-cycle designs allow variable execution times and more efficient reuse of limited resources, especially relevant to earlier computer systems.
Pipelining:
Analogous to an assembly line: increases instruction throughput even if individual instruction latency may be slightly longer.
Illustrated with a simplified laundry example where tasks are divided into stages and performed concurrently by two people, assuming each step takes 30 minutes.